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Searched refs:MPLL_SEQ_UCODE_1__INSTR4_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h11478 #define MPLL_SEQ_UCODE_1__INSTR4_MASK 0x000f0000L macro
H A Dgmc_7_1_sh_mask.h9411 #define MPLL_SEQ_UCODE_1__INSTR4_MASK 0xf0000 macro
H A Dgmc_8_1_sh_mask.h10323 #define MPLL_SEQ_UCODE_1__INSTR4_MASK 0xf0000 macro