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Searched refs:MPHY_PGSR0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dddrmphy-regs.h41 #define MPHY_PGSR0 (0x006 << MPHY_SHIFT) macro
H A Dumc-pxs2.c232 while (!(readl(phy_base + MPHY_PGSR0) & MPHY_PGSR0_IDONE)) in ddrphy_init()
339 pgsr0 = readl(phy_base + MPHY_PGSR0); in __ddrphy_training()