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Searched refs:MPHY_PGCR1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dumc-pxs2.c79 tmp = readl(phy_base + MPHY_PGCR1); in ddrphy_vt_ctrl()
86 writel(tmp, phy_base + MPHY_PGCR1); in ddrphy_vt_ctrl()
159 writel(0x0200c4e0, phy_base + MPHY_PGCR1); in ddrphy_init()
H A Dddrmphy-regs.h35 #define MPHY_PGCR1 (0x003 << MPHY_SHIFT) macro