Home
last modified time | relevance | path

Searched refs:MPHY_DX_LCDLR1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dcmd_ddrmphy.c134 readl(dx_base + MPHY_DX_LCDLR1) & 0xff); in __wbdl_dump()
152 (readl(dx_base + MPHY_DX_LCDLR1) >> 8) & 0xff); in __rbdl_dump()
155 (readl(dx_base + MPHY_DX_LCDLR1) >> 16) & 0xff); in __rbdl_dump()
H A Dumc-pxs2.c103 lcdlr1 = readl(dx_base + MPHY_DX_LCDLR1); in ddrphy_dqs_delay_fixup()
107 writel(lcdlr1, dx_base + MPHY_DX_LCDLR1); in ddrphy_dqs_delay_fixup()
108 readl(dx_base + MPHY_DX_LCDLR1); /* relax */ in ddrphy_dqs_delay_fixup()
H A Dddrmphy-regs.h140 #define MPHY_DX_LCDLR1 (0x00F << MPHY_SHIFT) macro