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Searched refs:MPHY_ACIOCR5 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dddrmphy-regs.h87 #define MPHY_ACIOCR5 (0x01F << MPHY_SHIFT) macro
H A Dumc-pxs2.c178 writel(0x00000055, phy_base + MPHY_ACIOCR5); in ddrphy_init()