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Searched refs:MP1_SMN_C2PMSG_67__CONTENT__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr_vbios_smu.c63 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x00000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_11_0_8_sh_mask.h259 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_13_0_4_sh_mask.h369 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_13_0_8_sh_mask.h369 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_13_0_2_sh_mask.h377 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_13_0_6_sh_mask.h368 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_13_0_5_sh_mask.h369 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_13_0_0_sh_mask.h368 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_12_0_0_sh_mask.h361 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_10_0_sh_mask.h366 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_11_5_0_sh_mask.h366 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_11_0_sh_mask.h801 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT … macro
H A Dmp_9_0_sh_mask.h386 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 macro