Searched refs:MOVN (Results 1 – 5 of 5) sorted by relevance
/openbmc/u-boot/arch/mips/include/asm/ |
H A D | asm.h | 182 #define MOVN(rd, rs, rt) \ macro 198 #define MOVN(rd, rs, rt) \ macro 215 #define MOVN(rd, rs, rt) \ macro
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/openbmc/qemu/target/mips/tcg/ |
H A D | micromips_translate.c.inc | 179 MOVN = 0x0, 1746 case MOVN: /* MUL */ 1751 /* MOVN */ 2268 FINSN_3ARG_SDPS(MOVN); 2273 FINSN_3ARG_SDPS(MOVN);
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/openbmc/qemu/target/arm/tcg/ |
H A D | a64.decode | 131 MOVN . 00 100101 .. ................ ..... @movw_64 132 MOVN . 00 100101 .. ................ ..... @movw_32
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/openbmc/qemu/tcg/aarch64/ |
H A D | tcg-target.c.inc | 1117 tcg_out_insn(s, 3405, MOVN, type, rd, ivalue, 0); 1148 /* Would it take fewer insns to begin with MOVN? */
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/openbmc/qemu/disas/ |
H A D | nanomips.c | 10115 static char *MOVN(uint64 instruction, Dis_info *info) in MOVN() function 16215 0xfc0007ff, 0x20000610, &MOVN , 0,
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