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Searched refs:MMCR2_UREG_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dpower8-pmu-regs.c.inc157 tcg_gen_andi_tl(t0, t0, MMCR2_UREG_MASK);
170 * Filter the bits that can be written using MMCR2_UREG_MASK,
174 MMCR2_UREG_MASK);
H A Dcpu.h549 #define MMCR2_UREG_MASK (MMCR2_FC1P0 | MMCR2_FC2P0 | MMCR2_FC3P0 | \ macro