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Searched refs:MMCR1_TD_CP_DBG0SEL_SH (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/powerpc/perf/
H A Dppc970-pmu.c54 #define MMCR1_TD_CP_DBG0SEL_SH 50 macro
344 << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte); in p970_compute_mmcr()
H A Dpower5-pmu.c50 #define MMCR1_TD_CP_DBG0SEL_SH 54 macro
487 << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte); in power5_compute_mmcr()
H A Dpower5+-pmu.c50 #define MMCR1_TD_CP_DBG0SEL_SH 54 macro
547 << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte); in power5p_compute_mmcr()