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Searched refs:MMCR0_FCECE (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dpower8-pmu.c340 if (env->spr[SPR_POWER_MMCR0] & MMCR0_FCECE) { in perfm_alert()
H A Dcpu.h529 #define MMCR0_FCECE PPC_BIT(38) /* FC on Enabled Cond or Event */ macro
/openbmc/linux/arch/powerpc/include/asm/
H A Dreg.h870 #define MMCR0_FCECE ASM_CONST(0x02000000) /* freeze ctrs on enabled cond or event */ macro
1052 #define MMCR0_FCECE 0x02000000UL /* freeze ctrs on enabled cond or event */ macro
/openbmc/linux/arch/powerpc/perf/
H A Dcore-book3s.c1567 cpuhw->mmcr.mmcr0 |= MMCR0_PMXE | MMCR0_FCECE; in power_pmu_enable()
1743 cpuhw->mmcr.mmcr0 &= ~(MMCR0_PMXE | MMCR0_FCECE); in power_pmu_del()
/openbmc/linux/arch/powerpc/kvm/
H A Dbook3s_hv_rmhandlers.S2966 lis r3, (MMCR0_PMXE | MMCR0_FCECE)@h