Searched refs:MLX5_FPGA_ACCESS_REG_SZ (Results 1 – 1 of 1) sorted by relevance
40 #define MLX5_FPGA_ACCESS_REG_SZ (MLX5_ST_SZ_DW(fpga_access_reg) + \ macro46 u32 in[MLX5_FPGA_ACCESS_REG_SZ] = {0}; in mlx5_fpga_access_reg()47 u32 out[MLX5_FPGA_ACCESS_REG_SZ]; in mlx5_fpga_access_reg()