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Searched refs:MIP_VSTIP (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dtime_helper.c58 if (timer_irq == MIP_VSTIP && in riscv_timer_write_timecmp()
72 if (timer_irq == MIP_VSTIP) { in riscv_timer_write_timecmp()
82 if (timer_irq == MIP_VSTIP) { in riscv_timer_write_timecmp()
160 if ((timer_irq == MIP_VSTIP) && in riscv_timer_disable_timecmp()
175 env->htimedelta, MIP_VSTIP); in riscv_timer_stce_changed()
177 riscv_timer_disable_timecmp(env, env->vstimer, MIP_VSTIP); in riscv_timer_stce_changed()
H A Dcpu_bits.h825 #define MIP_VSTIP (1 << IRQ_VS_TIMER) macro
851 #define VS_MODE_INTERRUPTS ((uint64_t)(MIP_VSSIP | MIP_VSTIP | MIP_VSEIP))