Searched refs:MIP_STIP (Results 1 – 3 of 3) sorted by relevance
| /openbmc/qemu/target/riscv/ |
| H A D | time_helper.c | 36 riscv_cpu_update_mip(&cpu->env, MIP_STIP, BOOL_TO_MASK(1)); in riscv_stimer_cb()
76 riscv_cpu_update_mip(env, MIP_STIP, BOOL_TO_MASK(1)); in riscv_timer_write_timecmp()
153 if ((timer_irq == MIP_STIP) && !get_field(env->menvcfg, MENVCFG_STCE)) { in riscv_timer_disable_timecmp()
182 riscv_timer_write_timecmp(env, env->stimer, env->stimecmp, 0, MIP_STIP); in riscv_timer_stce_changed()
184 riscv_timer_disable_timecmp(env, env->stimer, MIP_STIP); in riscv_timer_stce_changed()
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| H A D | cpu_bits.h | 824 #define MIP_STIP (1 << IRQ_S_TIMER) macro
836 #define SIP_STIP MIP_STIP
850 #define S_MODE_INTERRUPTS ((uint64_t)(MIP_SSIP | MIP_STIP | MIP_SEIP))
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| /openbmc/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 54 #define MIP_STIP BIT(IRQ_S_TIMER) macro
62 #define SIP_STIP MIP_STIP
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