Searched refs:MIPS_DSP_ACC (Results 1 – 4 of 4) sorted by relevance
| /openbmc/qemu/target/mips/tcg/ |
| H A D | translate.h | 188 extern TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC];
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| H A D | translate.c | 1204 TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC];
15521 for (unsigned i = 0; i < MIPS_DSP_ACC; i++) { in mips_tcg_init()
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| /openbmc/qemu/target/mips/sysemu/ |
| H A D | machine.c | 88 VMSTATE_UINTTL_ARRAY(HI, TCState, MIPS_DSP_ACC),
89 VMSTATE_UINTTL_ARRAY(LO, TCState, MIPS_DSP_ACC),
90 VMSTATE_UINTTL_ARRAY(ACX, TCState, MIPS_DSP_ACC),
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| /openbmc/qemu/target/mips/ |
| H A D | cpu.h | 132 #define MIPS_DSP_ACC 4 macro
472 target_ulong HI[MIPS_DSP_ACC];
473 target_ulong LO[MIPS_DSP_ACC];
474 target_ulong ACX[MIPS_DSP_ACC];
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