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Searched refs:MIIM_MII_CMD (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_devcpu_gcb_miim_regs.h12 #define MIIM_MII_CMD(gi) (0xa8 + (gi * 36)) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_devcpu_gcb_miim_regs.h10 #define MIIM_MII_CMD(gi) (0xcc + (gi * 36)) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_devcpu_gcb_miim_regs.h10 #define MIIM_MII_CMD(gi) (0xd0 + (gi * 36)) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_devcpu_gcb_miim_regs.h10 #define MIIM_MII_CMD(gi) (0xa4 + (gi * 36)) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_devcpu_gcb_miim_regs.h10 #define MIIM_MII_CMD(gi) (0x64 + (gi * 36)) macro
/openbmc/u-boot/arch/mips/mach-mscc/
H A Dphy.c30 writel(data, BASE_DEVCPU_GCB + MIIM_MII_CMD(miimdev)); in mscc_phy_rd_wr()