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Searched refs:MIDR_PARTNUM_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/armv8/
H A Dcpu.h10 #define MIDR_PARTNUM_MASK (0xFFF << 0x4) macro
21 #define is_cortex_a35() (((read_midr() & MIDR_PARTNUM_MASK) >> \
23 #define is_cortex_a53() (((read_midr() & MIDR_PARTNUM_MASK) >> \
25 #define is_cortex_a72() (((read_midr() & MIDR_PARTNUM_MASK) >>\
/openbmc/linux/tools/arch/arm64/include/asm/
H A Dcputype.h27 #define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT) macro
29 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
51 #define MIDR_CPU_MODEL_MASK (MIDR_IMPLEMENTOR_MASK | MIDR_PARTNUM_MASK | \
/openbmc/linux/arch/arm64/include/asm/
H A Dcputype.h27 #define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT) macro
29 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
51 #define MIDR_CPU_MODEL_MASK (MIDR_IMPLEMENTOR_MASK | MIDR_PARTNUM_MASK | \