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Searched refs:MIDR_CPU_VAR_REV (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/char/hw_random/
H A Dcavium-rng-vf.c42 MIDR_CPU_VAR_REV(0, 0), in is_octeontx()
43 MIDR_CPU_VAR_REV(3, 0)) || in is_octeontx()
45 MIDR_CPU_VAR_REV(0, 0), in is_octeontx()
46 MIDR_CPU_VAR_REV(3, 0)) || in is_octeontx()
48 MIDR_CPU_VAR_REV(0, 0), in is_octeontx()
49 MIDR_CPU_VAR_REV(3, 0))) in is_octeontx()
/openbmc/linux/tools/arch/arm64/include/asm/
H A Dcputype.h48 #define MIDR_CPU_VAR_REV(var, rev) \ macro
202 #define MIDR_FUJITSU_ERRATUM_010001_MASK (~MIDR_CPU_VAR_REV(1, 0))
229 .rv_min = MIDR_CPU_VAR_REV(v_min, r_min), \
230 .rv_max = MIDR_CPU_VAR_REV(v_max, r_max), \
/openbmc/linux/arch/arm64/include/asm/
H A Dcputype.h48 #define MIDR_CPU_VAR_REV(var, rev) \ macro
223 #define MIDR_FUJITSU_ERRATUM_010001_MASK (~MIDR_CPU_VAR_REV(1, 0))
250 .rv_min = MIDR_CPU_VAR_REV(v_min, r_min), \
251 .rv_max = MIDR_CPU_VAR_REV(v_max, r_max), \
/openbmc/linux/arch/arm64/kernel/
H A Dcpu_errata.c780 MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)),
H A Dcpufeature.c1563 MIDR_CPU_VAR_REV(0, 0), in has_no_hw_prefetch()
1564 MIDR_CPU_VAR_REV(1, MIDR_REVISION_MASK)); in has_no_hw_prefetch()