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Searched refs:MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK (Results 1 – 20 of 20) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7771 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK 0x00010000L macro
H A Ddce_8_0_sh_mask.h1569 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK 0x10000 macro
H A Ddce_10_0_sh_mask.h1605 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK 0x10000 macro
H A Ddce_11_0_sh_mask.h1553 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK 0x10000 macro
H A Ddce_11_2_sh_mask.h1715 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK 0x10000 macro
H A Ddce_12_0_sh_mask.h2736 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h213 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_0_3_sh_mask.h599 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_2_1_0_sh_mask.h543 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_1_0_sh_mask.h2098 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_0_1_sh_mask.h929 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_2_1_sh_mask.h391 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_1_2_sh_mask.h861 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_1_5_sh_mask.h364 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_1_6_sh_mask.h1398 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_1_4_sh_mask.h8329 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_0_2_sh_mask.h654 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_2_0_0_sh_mask.h661 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_0_0_sh_mask.h640 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro
H A Ddcn_3_2_0_sh_mask.h392 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL_MASK macro