Searched refs:MDIO_CTRL_CLK_25_4 (Results 1 – 2 of 2) sorted by relevance
306 u16 clk_sel = MDIO_CTRL_CLK_25_4; in atl1c_read_phy_core()355 u16 clk_sel = MDIO_CTRL_CLK_25_4; in atl1c_write_phy_core()
279 #define MDIO_CTRL_CLK_25_4 0 /* 25MHz divide 4 */ macro