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Searched refs:MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v6_0.c478 MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK | in gmc_v6_0_gart_enable()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h3007 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK 0x1 macro
H A Dgmc_8_2_sh_mask.h3855 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK 0x1 macro
H A Dgmc_6_0_sh_mask.h9964 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK 0x00000001L macro
H A Dgmc_7_1_sh_mask.h3611 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK 0x1 macro
H A Dgmc_8_1_sh_mask.h4013 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK 0x1 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_1_sh_mask.h9733 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
H A Dmmhub_1_0_sh_mask.h10070 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
H A Dmmhub_9_3_0_sh_mask.h10208 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
H A Dmmhub_1_8_0_sh_mask.h21971 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
H A Dmmhub_1_7_sh_mask.h32170 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h8652 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
H A Dgc_9_2_1_sh_mask.h8282 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
H A Dgc_9_1_sh_mask.h8451 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
H A Dgc_9_4_3_sh_mask.h11320 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro
H A Dgc_9_4_2_sh_mask.h31688 #define MC_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK … macro