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Searched refs:MC_SEQ_SUP_CNTL__RUN_MASK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v6_0.c168 running = RREG32(mmMC_SEQ_SUP_CNTL) & MC_SEQ_SUP_CNTL__RUN_MASK; in gmc_v6_0_mc_load_microcode()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h8796 #define MC_SEQ_SUP_CNTL__RUN_MASK 0x00000001L macro
H A Dgmc_7_1_sh_mask.h8705 #define MC_SEQ_SUP_CNTL__RUN_MASK 0x1 macro
H A Dgmc_8_1_sh_mask.h9617 #define MC_SEQ_SUP_CNTL__RUN_MASK 0x1 macro