MC_CGM_ACn_SEL_DDRPLL (reference) in projects: openbmc

Searched refs:MC_CGM_ACn_SEL_DDRPLL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-s32v234/
H A D	mc_cgm_regs.h	`63 #define MC_CGM_ACn_SEL_DDRPLL (0x5) macro`
/openbmc/u-boot/board/freescale/s32v234evb/
H A D	clock.c	`236 aux_source_clk_config(MC_CGM0_BASE_ADDR, 8, MC_CGM_ACn_SEL_DDRPLL); in setup_aux_clocks()`