Home
last modified time | relevance | path

Searched refs:MCYCLECFG_BIT_SINH (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h896 #define MCYCLECFG_BIT_SINH BIT_ULL(61) macro
H A Dcsr.c848 inh_avail_mask |= riscv_has_ext(env, RVS) ? MCYCLECFG_BIT_SINH : 0; in write_mcyclecfg()
1049 if (!(cfg_val & MCYCLECFG_BIT_SINH)) { in riscv_pmu_ctr_get_fixed_counters_val()