Searched refs:MCYCLECFGH_BIT_VSINH (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/riscv/ | ||
| H A D | cpu_bits.h | 918 #define MCYCLECFGH_BIT_VSINH BIT(27) macro |
| H A D | csr.c | 915 riscv_has_ext(env, RVS)) ? MCYCLECFGH_BIT_VSINH : 0; in write_mcyclecfgh() |