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Searched refs:MCTL_DCR_DDR3 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun6i.h337 #define MCTL_DCR_DDR3 0x0b macro
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun6i.c147 writel(MCTL_DCR_DDR3, &mctl_phy->dcr); in mctl_channel_init()