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Searched refs:MCR_D1_VALUE (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/board/ms7750se/
H A Dlowlevel_init.S30 #define MCR_D1_VALUE 0x100901B4 /* SDRAM 32-bit, CAS/RAS Refresh, .. */ macro
41 #define MCR_D1_VALUE 0x8801001C /* SDRAM 64-bit, CAS/RAS Refresh, .. */ macro
137 MCR_D1: .long MCR_D1_VALUE