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Searched refs:MCF_IPSBAR (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/m68k/include/asm/
H A Dm527xsim.h92 #define MCFDMA_BASE0 (MCF_IPSBAR + 0x100)
93 #define MCFDMA_BASE1 (MCF_IPSBAR + 0x140)
94 #define MCFDMA_BASE2 (MCF_IPSBAR + 0x180)
95 #define MCFDMA_BASE3 (MCF_IPSBAR + 0x1C0)
100 #define MCFUART_BASE0 (MCF_IPSBAR + 0x200)
101 #define MCFUART_BASE1 (MCF_IPSBAR + 0x240)
102 #define MCFUART_BASE2 (MCF_IPSBAR + 0x280)
107 #define MCFFEC_BASE0 (MCF_IPSBAR + 0x1000)
110 #define MCFFEC_BASE1 (MCF_IPSBAR + 0x1800)
117 #define MCFQSPI_BASE (MCF_IPSBAR + 0x340)
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H A Dm528xsim.h72 #define MCFDMA_BASE0 (MCF_IPSBAR + 0x00000100)
73 #define MCFDMA_BASE1 (MCF_IPSBAR + 0x00000140)
74 #define MCFDMA_BASE2 (MCF_IPSBAR + 0x00000180)
75 #define MCFDMA_BASE3 (MCF_IPSBAR + 0x000001C0)
80 #define MCFUART_BASE0 (MCF_IPSBAR + 0x00000200)
81 #define MCFUART_BASE1 (MCF_IPSBAR + 0x00000240)
87 #define MCFFEC_BASE0 (MCF_IPSBAR + 0x00001000)
93 #define MCFQSPI_BASE (MCF_IPSBAR + 0x340)
243 #define MCF_RCR (MCF_IPSBAR + 0x110000)
244 #define MCF_RSR (MCF_IPSBAR + 0x110001)
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H A Dm523xsim.h72 #define MCF_RCR (MCF_IPSBAR + 0x110000)
73 #define MCF_RSR (MCF_IPSBAR + 0x110001)
81 #define MCFUART_BASE0 (MCF_IPSBAR + 0x200)
82 #define MCFUART_BASE1 (MCF_IPSBAR + 0x240)
83 #define MCFUART_BASE2 (MCF_IPSBAR + 0x280)
88 #define MCFFEC_BASE0 (MCF_IPSBAR + 0x1000)
94 #define MCFQSPI_BASE (MCF_IPSBAR + 0x340)
209 #define MCFDMA_BASE0 (MCF_IPSBAR + 0x100)
210 #define MCFDMA_BASE1 (MCF_IPSBAR + 0x140)
211 #define MCFDMA_BASE2 (MCF_IPSBAR + 0x180)
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H A Dcoldfire.h46 #define MCF_IPSBAR CONFIG_IPSBAR macro
/openbmc/linux/arch/m68k/coldfire/
H A Ddma_timer.c23 #define DTMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x400)
24 #define DTXMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x402)
25 #define DTER0 (MCF_IPSBAR + DMA_TIMER_0 + 0x403)
26 #define DTRR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x404)
27 #define DTCR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x408)
28 #define DTCN0 (MCF_IPSBAR + DMA_TIMER_0 + 0x40c)