Searched refs:MCFSIM_IMR (Results 1 – 9 of 9) sorted by relevance
48 imr = __raw_readw(MCFSIM_IMR); in mcf_setimr()49 __raw_writew(imr | (0x1 << index), MCFSIM_IMR); in mcf_setimr()55 imr = __raw_readw(MCFSIM_IMR); in mcf_clrimr()56 __raw_writew(imr & ~(0x1 << index), MCFSIM_IMR); in mcf_clrimr()62 imr = __raw_readw(MCFSIM_IMR); in mcf_maskimr()64 __raw_writew(imr, MCFSIM_IMR); in mcf_maskimr()72 imr = __raw_readl(MCFSIM_IMR); in mcf_setimr()73 __raw_writel(imr | (0x1 << index), MCFSIM_IMR); in mcf_setimr()79 imr = __raw_readl(MCFSIM_IMR); in mcf_clrimr()86 imr = __raw_readl(MCFSIM_IMR); in mcf_maskimr()[all …]
61 #define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ macro145 *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))148 *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
88 mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400); in dtimer_intr_setup()
694 mbar_writeLong(MCFSIM_IMR, 0xfffffbff); in cpu_init_f()
36 #define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */ macro
44 #define MCFSIM_IMR (MCF_MBAR + 0x36) /* Interrupt Mask */ macro
41 #define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */ macro
50 #define MCFSIM_IMR MCFSIM_IMRL macro