Searched refs:MAX_REGULAR_DPM_NUMBER (Results 1 – 11 of 11) sorted by relevance
122 #define MAX_REGULAR_DPM_NUMBER 8 macro136 struct vega10_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];221 struct vega10_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];286 struct phm_ppt_v1_clock_voltage_dependency_record entries[MAX_REGULAR_DPM_NUMBER];291 struct phm_ppt_v1_voltage_lookup_record entries[MAX_REGULAR_DPM_NUMBER];
95 #define MAX_REGULAR_DPM_NUMBER 16 macro109 struct vega12_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];114 uint32_t entries[MAX_REGULAR_DPM_NUMBER];211 struct vega12_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];284 entries[MAX_REGULAR_DPM_NUMBER];
95 #define MAX_REGULAR_DPM_NUMBER 8 macro100 struct smu7_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];179 phm_ppt_v1_clock_voltage_dependency_record entries[MAX_REGULAR_DPM_NUMBER];210 struct smu7_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];
139 #define MAX_REGULAR_DPM_NUMBER 16 macro162 struct vega20_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];167 uint32_t entries[MAX_REGULAR_DPM_NUMBER];272 struct vega20_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];347 entries[MAX_REGULAR_DPM_NUMBER];
175 #define MAX_REGULAR_DPM_NUMBER 8 macro184 struct smu10_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];
664 MAX_REGULAR_DPM_NUMBER); in smu7_setup_default_pcie_table()749 MAX_REGULAR_DPM_NUMBER); in smu7_reset_dpm_tables()753 SMU_MAX_LEVELS_MEMORY), MAX_REGULAR_DPM_NUMBER); in smu7_reset_dpm_tables()759 MAX_REGULAR_DPM_NUMBER); in smu7_reset_dpm_tables()763 SMU_MAX_LEVELS_VDDCI), MAX_REGULAR_DPM_NUMBER); in smu7_reset_dpm_tables()769 MAX_REGULAR_DPM_NUMBER); in smu7_reset_dpm_tables()
1142 PP_ASSERT_WITH_CODE(table->count <= MAX_REGULAR_DPM_NUMBER, in vega12_find_highest_dpm_level()1144 return MAX_REGULAR_DPM_NUMBER - 1); in vega12_find_highest_dpm_level()
1804 while (i < MAX_REGULAR_DPM_NUMBER) { in vega10_populate_vddc_soc_levels()3610 if (table->count <= MAX_REGULAR_DPM_NUMBER) { in vega10_find_highest_dpm_level()3617 return MAX_REGULAR_DPM_NUMBER - 1; in vega10_find_highest_dpm_level()
1804 PP_ASSERT_WITH_CODE(table->count <= MAX_REGULAR_DPM_NUMBER, in vega20_find_highest_dpm_level()1806 return MAX_REGULAR_DPM_NUMBER - 1); in vega20_find_highest_dpm_level()
60 #define MAX_REGULAR_DPM_NUMBER 8 macro65 struct ci_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];
3342 for (i = 0; i < MAX_REGULAR_DPM_NUMBER; i++) in ci_reset_single_dpm_table()