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Searched refs:MAX_PHASE_2TO1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.h180 #define MAX_PHASE_2TO1 4 macro
H A Dddr3_write_leveling.c348 % MAX_PHASE_2TO1); in ddr3_wl_supplement()
1216 phaseMax = MAX_PHASE_2TO1; in ddr3_write_leveling_single_cs()