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Searched refs:MAT (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/loongarch/
H A Dcpu-csr.h68 FIELD(TLBENTRY, MAT, 4, 2)
195 FIELD(CSR_DMW, MAT, 4, 2)
/openbmc/linux/drivers/i2c/busses/
H A Di2c-rcar.c79 #define MAT BIT(0) /* slave addr xfer done */ macro
96 #define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE)
97 #define RCAR_IRQ_RECV (MNR | MAL | MST | MAT | MDR)
500 if (msr & MAT) in rcar_i2c_irq_send()
501 irqs_to_clear |= MAT; in rcar_i2c_irq_send()
550 if (msr & MAT) { in rcar_i2c_irq_recv()
551 irqs_to_clear |= MAT; in rcar_i2c_irq_recv()
/openbmc/linux/drivers/eisa/
H A Deisa.ids655 ICU04C0 "Zenith LAN10E-MAT/FAT/FL-AT"
/openbmc/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt7182 writecombine= [LOONGARCH] Control the MAT (Memory Access Type) of