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Searched refs:MASK_OP_MAJOR (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dinstmap.h22 #define MASK_OP_MAJOR(op) (op & 0x7F) macro
56 #define MASK_OP_ARITH(op) (MASK_OP_MAJOR(op) | (op & ((0x7 << 12) | \
83 #define MASK_OP_ARITH_IMM(op) (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
96 #define MASK_OP_BRANCH(op) (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
129 #define MASK_OP_LOAD(op) (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
140 #define MASK_OP_STORE(op) (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
148 #define MASK_OP_JALR(op) (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
152 (MASK_OP_MAJOR(op) | (op & ((0x7 << 12) | (0x7F << 25))))
154 (MASK_OP_MAJOR(op) | (op & (0x1F << 27)))
170 #define MASK_OP_SYSTEM(op) (MASK_OP_MAJOR(op) | (op & (0x7 << 12)))
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H A Dcpu_helper.c1583 switch (MASK_OP_MAJOR(insn)) { in riscv_transformed_insn()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.h62 #define MASK_OP_MAJOR(op) (op & (0x3F << 26)) macro
67 #define MASK_CP1(op) (MASK_OP_MAJOR(op) | (op & (0x1F << 21)))
H A Dtranslate.c158 #define MASK_OPC_PCREL_TOP2BITS(op) (MASK_OP_MAJOR(op) | (op & (3 << 19)))
159 #define MASK_OPC_PCREL_TOP5BITS(op) (MASK_OP_MAJOR(op) | (op & (0x1f << 16)))
175 #define MASK_SPECIAL(op) (MASK_OP_MAJOR(op) | (op & 0x3F))
297 #define MASK_REGIMM(op) (MASK_OP_MAJOR(op) | (op & (0x1F << 16)))
322 #define MASK_SPECIAL2(op) (MASK_OP_MAJOR(op) | (op & 0x3F))
354 #define MASK_SPECIAL3(op) (MASK_OP_MAJOR(op) | (op & 0x3F))
443 #define MASK_LOONGSON_GSLSQ(op) (MASK_OP_MAJOR(op) | (op & 0x8020))
467 #define MASK_LOONGSON_LSDC2(op) (MASK_OP_MAJOR(op) | (op & 0x7))
1098 #define MASK_CP3(op) (MASK_OP_MAJOR(op) | (op & 0x3F))
1186 #define MASK_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
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/openbmc/qemu/target/tricore/
H A Dtricore-opcodes.h34 #define MASK_OP_MAJOR(op) MASK_BITS_SHIFT(op, 0, 7) macro
H A Dtranslate.c3558 op1 = MASK_OP_MAJOR(ctx->opcode); in decode_16Bit_opc()
8022 op1 = MASK_OP_MAJOR(ctx->opcode); in decode_32Bit_opc()