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Searched refs:MAL0_RCBS0 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/ppc/
H A Dppc4xx_devs.c48 MAL0_RCBS0 = 0x1E0, enumerator
116 if (dcrn >= MAL0_RCBS0 && dcrn < MAL0_RCBS0 + mal->rxcnum) { in dcr_read_mal()
117 ret = mal->rcbs[dcrn - MAL0_RCBS0]; in dcr_read_mal()
176 if (dcrn >= MAL0_RCBS0 && dcrn < MAL0_RCBS0 + mal->rxcnum) { in dcr_write_mal()
177 mal->rcbs[dcrn - MAL0_RCBS0] = val & 0x000000FF; in dcr_write_mal()
220 ppc4xx_dcr_register(dcr, MAL0_RCBS0 + i, in ppc4xx_mal_realize()