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Searched refs:MACSR_PAV0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/m68k/
H A Dhelper.c1075 mask = MACSR_PAV0 << dest; in HELPER()
1076 if (env->macsr & (MACSR_PAV0 << src)) in HELPER()
1148 env->macsr |= MACSR_PAV0 << acc; in HELPER()
1170 env->macsr |= MACSR_PAV0 << acc; in HELPER()
1194 env->macsr |= MACSR_PAV0 << acc; in HELPER()
1211 if (env->macsr & (MACSR_PAV0 << acc)) { in HELPER()
H A Dcpu.h463 #define MACSR_PAV0 0x100 macro
H A Dtranslate.c5520 gen_op_and32(tmp, QREG_MACSR, tcg_constant_i32(MACSR_PAV0 << acc)); in DISAS_INSN()
5554 gen_op_and32(tmp, QREG_MACSR, tcg_constant_i32(MACSR_PAV0 << acc)); in DISAS_INSN()
5614 tcg_gen_andi_i32(QREG_MACSR, QREG_MACSR, ~(MACSR_PAV0 << accnum)); in DISAS_INSN()
5683 tcg_gen_andi_i32(QREG_MACSR, QREG_MACSR, ~(MACSR_PAV0 << accnum)); in DISAS_INSN()