Searched refs:Link (Results 1 – 25 of 346) sorted by relevance
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1 Link Layer Validation Device is a standard device for testing of Super2 Speed Link Layer tests. These nodes are available in sysfs only when lvs10 for Link Layer Validation device. It is needed for TD.7.06.16 Set "U1 timeout" for the downstream port where Link Layer24 Set "U2 timeout" for the downstream port where Link Layer32 Write to this node to issue "Reset" for Link Layer Validation39 Write to this node to issue "U3 entry" for Link Layer46 Write to this node to issue "U3 exit" for Link Layer53 with Link Layer Validation device. It is needed for TD.7.34.58 Write to this node to issue "Warm Reset" for Link Layer Validation
58 Link Error Status Block (LESB) link failure count.61 Link Error Status Block (LESB) virtual link65 Link Error Status Block (LESB) missed FCoE69 Link Error Status Block (LESB) symbolic error count.72 Link Error Status Block (LESB) block error count.75 Link Error Status Block (LESB) Fibre Channel
7 title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs13 The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO92 - 0 # FPD-Link III93 - 1 # FPD-Link IV111 description: FPD-Link Serializer node126 description: FPD-Link input 0139 description: FPD-Link input 1152 description: FPD-Link input 2165 description: FPD-Link input 3308 /* Link 0 has DS90UB953 serializer and IMX274 sensor */[all …]
7 title: Texas Instruments DS90UB953 FPD-Link III Serializer13 The TI DS90UB953 is an FPD-Link III video serializer for MIPI CSI-2.61 description: FPD-Link III output port
7 title: Texas Instruments DS90UB913 FPD-Link III Serializer13 The TI DS90UB913 is an FPD-Link III video serializer for parallel video.61 description: FPD-Link III output port
3 # D-Link device configuration7 bool "D-Link devices"15 the questions about D-Link devices. If you say Y, you will be asked for27 D-Link DGE-550T Gigabit Ethernet Adapter.28 D-Link DL2000-based Gigabit Ethernet Adapter.
7 title: TP-Link SafeLoader partitions10 TP-Link home routers store various data on flash (e.g. bootloader,14 Flash space layout of TP-Link devices is stored on flash itself using15 a custom ASCII-based format. That format was first found in TP-Link
3 # LAPB Data Link Drive7 tristate "LAPB Data Link Driver"9 Link Access Procedure, Balanced (LAPB) is the data link layer (i.e.
29 <b-button variant="link">Link Button</b-button>32 <span>Link Button</span>52 <b-button disabled variant="link">Link Button</b-button>55 <span>Link Button</span>
14 A-Link WL54PC29 D-Link DWL-520 Rev D31 TP-Link TL-WN250/25176 Asus Wireless Link
34 - description: Link clock from DP PHY036 - description: Link clock from DP PHY138 - description: Link clock from DP PHY240 - description: Link clock from DP PHY3
28 Those devices have been marketed under the FPD-Link and FlatLink brand names36 - ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer37 - ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer42 - ti,ds90cf364a # For the DS90CF364A FPD-Link LVDS Receiver43 - ti,ds90cf384a # For the DS90CF384A FPD-Link LVDS Receiver
7 title: Freescale i.MX8qm/qxp Display Pixel Link13 The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard21 The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
25 @@ -1576,6 +1576,7 @@ func (ctxt *Link) hostlink() {33 @@ -1591,6 +1592,7 @@ func (ctxt *Link) hostlink() {41 @@ -1599,6 +1601,7 @@ func (ctxt *Link) hostlink() {
10 Link, enumerator45 {NotifyIPv6Scope::Link, "Link"},
34 /* Possible Resource Settings for this Link */92 /* Possible Resource Settings for this Link */150 /* Possible Resource Settings for this Link */208 /* Possible Resource Settings for this Link */266 /* Possible Resource Settings for this Link */324 /* Possible Resource Settings for this Link */382 /* Possible Resource Settings for this Link */440 /* Possible Resource Settings for this Link */
431 # operations defined in Compute Express Link (CXL) Specification,438 # @host-id: The "Host ID" field as defined in Compute Express Link442 # Compute Express Link (CXL) Specification, Revision 3.1,447 # Link (CXL) Specification, Revision 3.1, Table 7-70. Valid450 # @tag: The "Tag" field as defined in Compute Express Link (CXL)497 # simulates operations defined in Compute Express Link (CXL)504 # @host-id: The "Host ID" field as defined in Compute Express Link508 # Compute Express Link (CXL) Specification, Revision 3.1,526 # Link Specification, Revision 3.1, Table 7-71. Valid range529 # @tag: The "Tag" field as defined in Compute Express Link (CXL)[all …]
139 Link Equalization Request flag is set in the Link Status 2141 the Link Control 3 register).190 Link Autonomous Bandwidth Status flag has been set in the Link192 Link Control register).195 Bandwidth Management Status flag has been set in the Link197 Link Control register).
39 patch to a subsystem tree, it is a good idea to provide a Link: tag with a44 Link: https://lore.kernel.org/r/<message-id>53 perl -pi -e 's|^Message-I[dD]:\s*<?([^>]+)>?$|Link: https://lore.kernel.org/r/$1|g;' "$1"
7 title: Qualcomm G-Link RPM edge10 Qualcomm G-Link edge, a FIFO based mechanism for communication with Resource49 Qualcomm Resource Power Manager (RPM) over G-Link
47 Link: https://lore.kernel.org/r/<message-id>57 perl -pi -e 's|^Message-Id:\s*<?([^>]+)>?$|Link: https://lore.kernel.org/r/$1|g;' "$1"
3 * Device tree for D-Link DIR-890L4 * D-Link calls this board "WRGAC36"5 * this router has the same looks and form factor as D-Link DIR-885L.25 model = "D-Link DIR-890L";
33 * CAIF Link Layer, implemented as NET devices.54 +--> ! HSI ! ! TTY ! ! USB ! <- Link Layer (Net Devices)101 Stack and provides a Client interface for adding Link-Layer and187 Configuration of Link Layer189 The Link Layer is implemented as Linux network devices (struct net_device).
3 [Link]