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Searched refs:LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7642 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h3230 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h3152 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h3222 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT 0x10 macro
H A Ddce_11_2_sh_mask.h3470 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT 0x10 macro
H A Ddce_12_0_sh_mask.h9299 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21296 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43284 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT … macro
H A Ddcn_1_0_sh_mask.h40050 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42566 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49162 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48793 #define LVTMA_PWRSEQ_DELAY2__LVTMA_PWRDN_DELAY3__SHIFT … macro