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Searched refs:LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7636 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT 0x00000018 macro
H A Ddce_8_0_sh_mask.h3224 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT 0x18 macro
H A Ddce_10_0_sh_mask.h3146 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT 0x18 macro
H A Ddce_11_0_sh_mask.h3216 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT 0x18 macro
H A Ddce_11_2_sh_mask.h3464 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT 0x18 macro
H A Ddce_12_0_sh_mask.h9291 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21288 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43276 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT … macro
H A Ddcn_1_0_sh_mask.h40042 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42558 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48785 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49154 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY2__SHIFT … macro