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Searched refs:LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7633 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK 0x00ff0000L macro
H A Ddce_8_0_sh_mask.h3221 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK 0xff0000 macro
H A Ddce_10_0_sh_mask.h3143 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK 0xff0000 macro
H A Ddce_11_0_sh_mask.h3213 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK 0xff0000 macro
H A Ddce_11_2_sh_mask.h3461 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK 0xff0000 macro
H A Ddce_12_0_sh_mask.h9294 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21291 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK … macro
H A Ddcn_2_1_0_sh_mask.h43279 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK … macro
H A Ddcn_1_0_sh_mask.h40045 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK … macro
H A Ddcn_3_0_2_sh_mask.h42561 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48788 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49157 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRDN_DELAY1_MASK … macro