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Searched refs:LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7611 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT 0x00000019 macro
H A Ddce_8_0_sh_mask.h3198 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT 0x19 macro
H A Ddce_10_0_sh_mask.h3120 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT 0x19 macro
H A Ddce_11_0_sh_mask.h3190 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT 0x19 macro
H A Ddce_11_2_sh_mask.h3438 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT 0x19 macro
H A Ddce_12_0_sh_mask.h9255 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21252 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43240 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT … macro
H A Ddcn_1_0_sh_mask.h40006 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42522 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48749 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49118 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD__SHIFT … macro