Searched refs:LTQ_SPI_CLC_RMC_S (Results 1 – 1 of 1) sorted by relevance
56 #define LTQ_SPI_CLC_RMC_S 8 /* Clock divider for normal run mode */ macro57 #define LTQ_SPI_CLC_RMC_M (0xFF << LTQ_SPI_CLC_RMC_S)353 lantiq_ssc_writel(spi, 1 << LTQ_SPI_CLC_RMC_S, LTQ_SPI_CLC); in lantiq_ssc_hw_init()