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Searched refs:LSU_CONTROL_DC (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/sparc/include/asm/
H A Dlsu.h17 #define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable. */ macro
/openbmc/linux/arch/sparc/kernel/
H A Dtrampoline_64.S93 mov (LSU_CONTROL_IC | LSU_CONTROL_DC | LSU_CONTROL_IM | LSU_CONTROL_DM), %g1
H A Dhead_64.S530 mov (LSU_CONTROL_IC|LSU_CONTROL_DC|LSU_CONTROL_IM|LSU_CONTROL_DM), %g1
H A Dtraps_64.c432 : "r" (LSU_CONTROL_IC | LSU_CONTROL_DC | in spitfire_clean_and_reenable_l1_caches()