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Searched refs:LR (Results 1 – 25 of 53) sorted by relevance

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/openbmc/linux/drivers/video/fbdev/matrox/
H A Dmatroxfb_maven.c548 LR(0x00); LR(0x01); LR(0x02); LR(0x03); in maven_init_TV()
550 LR(0x04); in maven_init_TV()
552 LR(0x2C); in maven_init_TV()
553 LR(0x08); in maven_init_TV()
554 LR(0x0A); in maven_init_TV()
555 LR(0x09); in maven_init_TV()
556 LR(0x29); in maven_init_TV()
559 LR(0x0B); in maven_init_TV()
560 LR(0x0C); in maven_init_TV()
575 LR(0x34); in maven_init_TV()
[all …]
H A Dmatroxfb_g450.c503 #define LR(x) cve2_set_reg(minfo, (x), m->regs[(x)]) macro
509 LR(0x80); in cve2_init_TV()
510 LR(0x82); LR(0x83); in cve2_init_TV()
511 LR(0x84); LR(0x85); in cve2_init_TV()
516 LR(i); in cve2_init_TV()
/openbmc/linux/arch/arm/kernel/
H A Dentry-ftrace.S67 str lr, [sp, #-8]! @ store LR as PC and make space for CPSR/OLD_R0,
68 @ OLD_R0 will overwrite previous LR
70 ldr lr, [sp, #8] @ get previous LR
72 str r0, [sp, #8] @ write r0 as OLD_R0 over previous LR
74 str lr, [sp, #-4]! @ store previous LR as LR
76 add lr, sp, #16 @ move in LR the value of SP as it was
83 @ R0 | R1 | ... | IP | SP + 4 | previous LR | LR | PSR | OLD_R0 |
92 ldr lr, [sp, #S_PC] @ get LR
109 ldr lr, [sp], #4 @ restore LR
132 ldr lr, [sp], #4 @ restore LR
H A Dunwind.c76 LR = 14, enumerator
371 ctrl->vrs[PC] = ctrl->vrs[LR]; in unwind_exec_insn()
396 ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); in unwind_exec_insn()
439 ctrl.vrs[LR] = frame->lr; in unwind_frame()
507 ctrl.vrs[PC] = ctrl.vrs[LR]; in unwind_frame()
515 frame->lr = ctrl.vrs[LR]; in unwind_frame()
H A Dentry-v7m.S53 push {r0, lr} @ preserve LR and original SP
/openbmc/openbmc/poky/meta/recipes-multimedia/mpeg2dec/files/
H A D0001-Import-revision-1206-from-upstream-to-fix-PIE-build.patch32 stmfd sp!, {r4-r11, lr} @ R14 is also called LR
50 ldmfd sp!, {r4-r11, pc} @@ update PC with LR content.
61 stmfd sp!, {r4-r10, lr} @ R14 is also called LR
79 ldmfd sp!, {r4-r10, pc} @@ update PC with LR content.
93 stmfd sp!, {r4-r11,lr} @ R14 is also called LR
115 ldmfd sp!, {r4-r11,pc} @@ update PC with LR content.
128 stmfd sp!, {r4-r11,lr} @ R14 is also called LR
150 ldmfd sp!, {r4-r11,pc} @@ update PC with LR content.
/openbmc/linux/tools/perf/arch/arm/tests/
H A Dregs_load.S18 #define LR 0x70 macro
55 str lr, [r0, #LR]
/openbmc/linux/tools/perf/arch/csky/util/
H A Dunwind-libdw.c38 dwarf_regs[15] = REG(LR); in libdw__arch_set_initial_registers()
72 dwarf_regs[15] = REG(LR); in libdw__arch_set_initial_registers()
/openbmc/linux/arch/powerpc/kernel/
H A Dswsusp_asm64.S83 SAVE_SPECIAL(LR)
129 RESTORE_SPECIAL(LR)
263 RESTORE_SPECIAL(LR)
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dsharp,ls037v7dw01.yaml35 GPIO ordered MO, LR, and UD as specified in LS037V7DW01.pdf
58 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/
H A Dpython3-lrparsing_1.0.17.bb1 SUMMARY = "Python LR parsing library"
/openbmc/linux/arch/arm/lib/
H A Dbacktrace.S67 bic sv_pc, sv_pc, mask @ mask PC/LR for the mode
77 bic r1, r1, mask @ mask PC/LR for the mode
/openbmc/linux/tools/perf/arch/arm/util/
H A Dunwind-libdw.c34 dwarf_regs[14] = REG(LR); in libdw__arch_set_initial_registers()
/openbmc/linux/Documentation/gpu/
H A Dkomeda-kms.rst102 rankdir=LR;
148 rankdir=LR;
226 rankdir=LR;
242 rankdir=LR;
257 rankdir=LR;
273 rankdir=LR;
289 rankdir=LR;
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/byacc/
H A Dbyacc.inc3 …"A parser generator utility that reads a grammar specification from a file and generates an LR(1) \
/openbmc/linux/net/ieee802154/
H A DKconfig11 Say Y here to compile LR-WPAN support into the kernel or say M to
/openbmc/linux/tools/perf/arch/arm64/util/
H A Dunwind-libdw.c50 dwarf_regs[30] = REG(LR); in libdw__arch_set_initial_registers()
/openbmc/linux/arch/arm/mm/
H A Dproc-v7m.S133 mov r6, lr @ save LR
142 mov lr, r6 @ restore LR
/openbmc/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Dixgbe.rst59 | LR Modules |
61 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | FTLX1471D3BCV-IT |
63 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDZ-IN2 |
65 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDDZ-IN1 |
78 | Finisar | SFP+ LR bailed, 10g single rate | FTLX1471D3BCL |
84 | Finisar | DUAL RATE 1G/10G SFP+ LR (No Bail) | FTLX1471D3QCV-IT |
86 | Avago | DUAL RATE 1G/10G SFP+ LR (No Bail) | AFCT-701SDZ-IN1 |
139 - LAN on Motherboard (LOMs) may support DA, SR, or LR modules. Other module
152 | Finisar | SFP+ LR bailed, 10g single rate | FTLX1471D3BCL |
/openbmc/linux/arch/powerpc/platforms/52xx/
H A Dlite5200_sleep.S71 SAVE_SPRN(LR, 0x1c)
251 LOAD_SPRN(LR, 0x1c)
/openbmc/linux/Documentation/livepatch/
H A Dreliable-stacktrace.rst289 Similarly, a function may deliberately clobber the LR, e.g.
296 ADR LR, <callee>
297 BLR LR
301 The ADR places the address of 'callee' into the LR, before the BLR branches to
308 reliably identify when the LR or stack value should be used (e.g. using
/openbmc/qemu/target/hexagon/idef-parser/
H A Didef-parser.lex341 "LR" { yylval->rvalue.type = REGISTER;
/openbmc/linux/tools/testing/selftests/powerpc/switch_endian/
H A Dcheck.S26 addi r9,r15,32 # check LR
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dmicrochip,sparx5-serdes.yaml63 * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
/openbmc/openbmc/poky/meta/recipes-devtools/gcc/gcc/
H A DCVE-2023-4039.patch820 /* FP and LR are placed in the linkage record. */
1503 /* FP and LR are placed in the linkage record. */
1860 * a probe using LR at SP + 80 bytes (or some other value >= 16)
1870 Putting LR before other registers prevents push/pop allocation
1871 when shadow call stacks are enabled, since LR is restored
1875 to be LR, since a later patch removes that restriction.
1882 when LR was not in the first 16 bytes.
1919 /* FP and LR are placed in the linkage record. */
2747 - | LR' | |
2758 + | LR' |
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