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Searched refs:LPDDR4_VREF_VALUE_CA (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing.c362 { 0x5401b, ((LPDDR4_VREF_VALUE_CA << 8) |
373 { 0x54021, ((LPDDR4_VREF_VALUE_CA << 8) |
402 { 0x54035, (0x0800 | LPDDR4_VREF_VALUE_CA)/*0x084d*/ },
496 { 0x54035, (0x0800 | LPDDR4_VREF_VALUE_CA) },
502 { 0x5403b, (0x0800 | LPDDR4_VREF_VALUE_CA) },
573 { 0x54035, (0x0800 | LPDDR4_VREF_VALUE_CA) },
579 { 0x5403b, (0x0800 | LPDDR4_VREF_VALUE_CA) },
626 { 0x5401b, ((LPDDR4_VREF_VALUE_CA << 8) |
637 { 0x54021, ((LPDDR4_VREF_VALUE_CA << 8) |
663 { 0x54035, (0x0800 | LPDDR4_VREF_VALUE_CA) },
[all …]
H A Dlpddr4_timing_b0.c350 { 0x5401b, ((LPDDR4_VREF_VALUE_CA << 8) |
357 { 0x54021, ((LPDDR4_VREF_VALUE_CA << 8) |
378 { 0x54035, (0x0800 | LPDDR4_VREF_VALUE_CA) },
384 { 0x5403b, (0x0800 | LPDDR4_VREF_VALUE_CA) },
428 { 0x5401b, ((LPDDR4_VREF_VALUE_CA << 8) |
434 { 0x54021, ((LPDDR4_VREF_VALUE_CA << 8) |
455 { 0x54035, (0x0800 | LPDDR4_VREF_VALUE_CA) },
461 { 0x5403b, (0x0800 | LPDDR4_VREF_VALUE_CA) },
505 { 0x5401b, ((LPDDR4_VREF_VALUE_CA << 8) |
512 { 0x54021, ((LPDDR4_VREF_VALUE_CA << 8) |
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dlpddr4_define.h87 #define LPDDR4_VREF_VALUE_CA ((1 << 6) | (0xd)) macro