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Searched refs:LPDDR4_PHY_RON (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing.c335 { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) }, /* PHY Ron/Rtt */
442 { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT)/*0x2828*/ },
523 { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },
600 { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },
H A Dlpddr4_timing_b0.c328 { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },
406 { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },
482 { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dlpddr4_define.h81 #define LPDDR4_PHY_RON 30 macro