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Searched refs:LPDDR4_MR22_RANK1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing.c377 { 0x54024, LPDDR4_MR22_RANK1 },
420 { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x500*/ },
422 { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x500*/ },
479 { 0x54024, LPDDR4_MR22_RANK1 },
504 { 0x5403d, (LPDDR4_MR22_RANK1 << 8) },
556 { 0x54024, LPDDR4_MR22_RANK1 },
581 { 0x5403d, (LPDDR4_MR22_RANK1 << 8) },
641 { 0x54024, LPDDR4_MR22_RANK1 },
675 { 0x5403d, (LPDDR4_MR22_RANK1 << 8) },
H A Dlpddr4_timing_b0.c361 { 0x54024, LPDDR4_MR22_RANK1 },
386 { 0x5403d, (LPDDR4_MR22_RANK1 << 8) },
387 { 0x5403d, (LPDDR4_MR22_RANK1 << 8) },
438 { 0x54024, LPDDR4_MR22_RANK1 },
463 { 0x5403d, (LPDDR4_MR22_RANK1 << 8) },
516 { 0x54024, LPDDR4_MR22_RANK1 },
541 { 0x5403d, (LPDDR4_MR22_RANK1 << 8) },
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dlpddr4_define.h92 #define LPDDR4_MR22_RANK1 ((1 << 5) | (1 << 4) | (1 << 3) | \ macro