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Searched refs:LPDDR4_MR22_RANK0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing.c366 { 0x5401e, LPDDR4_MR22_RANK0 },
405 { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x500*/ },
471 { 0x5401e, LPDDR4_MR22_RANK0/*0x5*/ },
498 { 0x54037, (LPDDR4_MR22_RANK0 << 8) },
549 { 0x5401e, LPDDR4_MR22_RANK0 },
575 { 0x54037, (LPDDR4_MR22_RANK0 << 8) },
630 { 0x5401e, LPDDR4_MR22_RANK0 },
665 { 0x54037, (LPDDR4_MR22_RANK0 << 8) },
H A Dlpddr4_timing_b0.c354 { 0x5401e, LPDDR4_MR22_RANK0 },
380 { 0x54037, (LPDDR4_MR22_RANK0 << 8) },
509 { 0x5401e, LPDDR4_MR22_RANK0 },
535 { 0x54037, (LPDDR4_MR22_RANK0 << 8) },
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dlpddr4_define.h90 #define LPDDR4_MR22_RANK0 ((0 << 5) | (1 << 4) | (0 << 3) | \ macro