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Searched refs:LPCR_HVICE (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/arch/powerpc/kernel/
H A Dcpu_setup_power.c218 LPCR_HVICE | LPCR_HEIC) & ~(LPCR_UPRT | LPCR_HR), 0); in __setup_cpu_power9()
240 LPCR_HVICE | LPCR_HEIC) & ~(LPCR_UPRT | LPCR_HR), 0); in __restore_cpu_power9()
261 LPCR_HVICE | LPCR_HEIC) & ~(LPCR_UPRT | LPCR_HR), 0); in __setup_cpu_power10()
285 LPCR_HVICE | LPCR_HEIC) & ~(LPCR_UPRT | LPCR_HR), 0); in __restore_cpu_power10()
H A Ddt_cpu_ftrs.c558 lpcr |= LPCR_HVICE; /* enable hvi interrupts */ in feat_enable_hvi()
/openbmc/linux/arch/powerpc/include/asm/
H A Dreg.h478 #define LPCR_HVICE ASM_CONST(0x0000000000000002) /* P9: HV interrupt enable */ macro
/openbmc/qemu/hw/ppc/
H A Dspapr_nested.c407 lpcr |= LPCR_HR | LPCR_UPRT | LPCR_GTSE | LPCR_HVICE | LPCR_HDICE; in h_enter_nested()
1740 lpcr |= LPCR_HR | LPCR_UPRT | LPCR_GTSE | LPCR_HVICE | LPCR_HDICE; in nested_papr_load_l2()
/openbmc/qemu/target/ppc/
H A Dexcp_helper.c1963 bool hvice = !!(env->spr[SPR_LPCR] & LPCR_HVICE); in p9_next_unmasked_interrupt()
2064 bool hvice = !!(env->spr[SPR_LPCR] & LPCR_HVICE); in ppc_next_unmasked_interrupt()
H A Dcpu.h630 #define LPCR_HVICE PPC_BIT(62) /* HV Virtualisation Int Enable */ macro
H A Dcpu_init.c6564 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; in POWERPC_FAMILY()
6744 LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; in POWERPC_FAMILY()
/openbmc/linux/arch/powerpc/kvm/
H A Dbook3s_hv.c5470 lpcr |= LPCR_HVICE | LPCR_HEIC; in kvmppc_core_init_vm_hv()