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Searched refs:LANE_PLL_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c338 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
344 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
350 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
356 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
H A Dpsb_intel_reg.h1326 #define LANE_PLL_MASK (0x7 << 20) macro