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Searched refs:L1CSR1_ICUL (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dstart.S986 rlwinm r11, r11, 0, ~L1CSR1_ICUL
1001 3: andi. r11, r11, L1CSR1_ICUL
1009 3: andi. r11, r11, L1CSR1_ICUL
1044 rlwinm r11, r11, 0, ~L1CSR1_ICUL
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h493 #define L1CSR1_ICUL 0x00000400 /* I-Cache Unable to Lock */ macro
/openbmc/qemu/target/ppc/
H A Dcpu.h2306 #define L1CSR1_ICUL 0x00000400 /* I-Cache Unable to Lock */ macro