L1CSR0_DCLFR (reference) in projects: openbmc

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Searched refs:L1CSR0_DCLFR (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A D	release.S	`120 lis r2,(L1CSR0_DCFI\|L1CSR0_DCLFR)@h 121 ori r2,r2,(L1CSR0_DCFI\|L1CSR0_DCLFR)@l`
H A D	start.S	`789 lis r2,(L1CSR0_DCFI\|L1CSR0_DCLFR)@h 790 ori r2,r2,(L1CSR0_DCFI\|L1CSR0_DCLFR)@l`
/openbmc/u-boot/arch/powerpc/include/asm/
H A D	processor.h	`488 #define L1CSR0_DCLFR 0x00000100 /* D-Cache Lock Flash Reset */ macro`
/openbmc/qemu/target/ppc/
H A D	cpu.h	`2300 #define L1CSR0_DCLFR 0x00000100 /* D-Cache Lock Flash Reset */ macro`

Last Index Update: Mon Sep 30 03:04:07 CDT 2024